90 nm. 45 nm. 5nm If you follow computer processors, chipsets, radio or video cards very closely at all, you have likely heard at least a passing reference to “process size”. But without any explanation, it’s hard to even guess at what this phrase means.
For more than a decade, engineers have been eyeing the finish line in the race to shrink the size of components in integrated circuits. This size in nm (nano – meters) governs the size of integrated circuits.
This size in nm is the gate length of the transistor. for clarity, the gate length is also an approximate measure of transistor speed and of how densely you can pack transistors together in a hand-crafted layout.
Why it ends Moore’s Law:
For years, the computing industry has been governed by Moore’s Law, which states that the the number of transistors in a semiconductor circuit doubles every two years. Current generation technology uses 14nm scale technology, with 10nm semiconductors anticipated for release in 2017 or 2018 with products like Intel’s Cannonlake line.
And that is true if you see the nm technologies advancements in the last years:
But looking to the future, Moore’s law starts to run into trouble. And by trouble, I mean the laws of physics. You see, while the 7nm node is technically possible to produce with silicon, after that point you reach problems, where silicon transistors smaller than 7nm become so physically close together that electrons experience quantum tunneling. So instead of staying in the intended logic gate, the electrons can continuously flow from one gate to the next, essentially making it impossible for the transistors to have an off state.
On June 5 2017, IBM revealed that they had created 5 nm silicon chips, using silicon nanosheets, a break from the usual finFET technology.
Lawrence Berkeley National Laboratory has successfully built a functional 1 nanometer long transistor gate, which the lab claims is smallest working transistor ever made.